Today's advanced modular design techniques use hierarchical designs subdividing system functions into functional modules. Modern electronic design tools are supporting hierarchical designs allowing designers to productively work applying top-down design methodologies as an effective precondition leading to modular system portioning.
System design applying the advanced methods typically consists of multiple top-level modules which are tied together in the top-level design finally representing the comprehensive system electronics. Each of the top-level modules may subsequently consist of one or more sub-level design entities, thus consequently following up a modular system approach. The electronic modules and sub modules developed applying this method are representing so called “functional modules”, by means of each module or sub-module is a logical implementation of a part/sub-part of the overall system electronics. These advanced design methods provide modularization on the level of logical architecture of an electronic circuit.
One big advantage of these design methods is the reusability of the functional modules on new system designs. These modules, however, are covering the logical system partitioning only and are not covering the physical design leading to the real hardware. The logical modules known in the art usually are tied together finally representing a so called flat physical design model, thus giving up or loosing the modularity.
For complex electronic board designs, i.e. a personal computer or a workstation, the physical design is representing the most time consuming and critical design effort of an overall system design effort. Within this design phase, all components will be placed to their physical board location with respect to timing and signal integrity concerns, board layer assignment and wire-ability and not at least power integrity requirements.
Critical electronic areas such as the processing subsystem, the memory subsystem, the high speed IO-electronics (IO=input/output) can pose problems even for minor design changes. Even when reusing key functional modules, new system designs or logically simple design changes in critical electronic areas or the power subsystem require to re-exercise the entire board physical design including time expensive signal integrity and power integrity simulations and respective redesigns. For these reasons migrating to the next level of processor variant, adding new features, upgrading performance as “very typical incremental” new designs even within a system family still require expensive development budget and development time-frame. Additionally, a certain quantum of new-design risk cannot be neglected. Besides the high cost and long development time for new system generations and the limited reusability of designs and components of predecessor systems, comprehensive development teams are required for each new design. Experienced and highly skilled specialists are needed for each sub-electronics area such as power design, digital design, analog design, IO-design, clock tree, timing etc.